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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_rx_ss___usr_opt.html">XDpRxSs_UsrOpt</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">User input structure.  <a href="struct_x_dp_rx_ss___usr_opt.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_rx_ss___dp_sub_core.html">XDpRxSs_DpSubCore</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">DisplayPort Sub-core structure.  <a href="struct_x_dp_rx_ss___dp_sub_core.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_rx_ss___iic_sub_core.html">XDpRxSs_IicSubCore</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">IIC Sub-core structure.  <a href="struct_x_dp_rx_ss___iic_sub_core.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_rx_ss___sub_core_config.html">XDpRxSs_SubCoreConfig</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for the DpRxSs subcore instances.  <a href="struct_x_dp_rx_ss___sub_core_config.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_rx_ss___hdcp1x_sub_core.html">XDpRxSs_Hdcp1xSubCore</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">High-Bandwidth Content Protection (HDCP) Sub-core structure.  <a href="struct_x_dp_rx_ss___hdcp1x_sub_core.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_rx_ss___tmr_ctr_sub_core.html">XDpRxSs_TmrCtrSubCore</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Timer Counter Sub-core structure.  <a href="struct_x_dp_rx_ss___tmr_ctr_sub_core.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_rx_ss___hdcp22_sub_core.html">XDpRxSs_Hdcp22SubCore</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sub-Core Configuration Table.  <a href="struct_x_dp_rx_ss___hdcp22_sub_core.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_rx_ss___config.html">XDpRxSs_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for the DisplayPort Receiver Subsystem core.  <a href="struct_x_dp_rx_ss___config.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The DisplayPort RX Subsystem driver instance data.  <a href="struct_x_dp_rx_ss.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Macros</h2></td></tr>
<tr class="memitem:ga2abe6f8f3f2b2f72e390c5bd1f2bf05b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga2abe6f8f3f2b2f72e390c5bd1f2bf05b">XDPRXSS_H_</a></td></tr>
<tr class="memdesc:ga2abe6f8f3f2b2f72e390c5bd1f2bf05b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Prevent circular inclusions by using protection macros.  <a href="group__dprxss.html#ga2abe6f8f3f2b2f72e390c5bd1f2bf05b">More...</a><br/></td></tr>
<tr class="separator:ga2abe6f8f3f2b2f72e390c5bd1f2bf05b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafacc99acbea2d401998a9f7f3c1d3a14"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gafacc99acbea2d401998a9f7f3c1d3a14">XDpRxSs_TimerHandler</a>&#160;&#160;&#160;XDp_TimerHandler</td></tr>
<tr class="memdesc:gafacc99acbea2d401998a9f7f3c1d3a14"><td class="mdescLeft">&#160;</td><td class="mdescRight">Callback type which represents a custom timer wait handler.  <a href="group__dprxss.html#gafacc99acbea2d401998a9f7f3c1d3a14">More...</a><br/></td></tr>
<tr class="separator:gafacc99acbea2d401998a9f7f3c1d3a14"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1f6dc9cb4d881f290c1c85b822e82119"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga1f6dc9cb4d881f290c1c85b822e82119">XDpRxSs_DtgEnable</a>(InstancePtr)&#160;&#160;&#160;XDp_RxDtgEn((InstancePtr)-&gt;DpPtr)</td></tr>
<tr class="memdesc:ga1f6dc9cb4d881f290c1c85b822e82119"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function macro enables the display timing generator (DTG).  <a href="group__dprxss.html#ga1f6dc9cb4d881f290c1c85b822e82119">More...</a><br/></td></tr>
<tr class="separator:ga1f6dc9cb4d881f290c1c85b822e82119"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa7278eacb198e9267491bcdb4f18295"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gaaa7278eacb198e9267491bcdb4f18295">XDpRxSs_DtgDisable</a>(InstancePtr)&#160;&#160;&#160;XDp_RxDtgDis((InstancePtr)-&gt;DpPtr)</td></tr>
<tr class="memdesc:gaaa7278eacb198e9267491bcdb4f18295"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function macro disables the display timing generator (DTG).  <a href="group__dprxss.html#gaaa7278eacb198e9267491bcdb4f18295">More...</a><br/></td></tr>
<tr class="separator:gaaa7278eacb198e9267491bcdb4f18295"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9e38329d9022180b1d0e4379af733ccb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga9e38329d9022180b1d0e4379af733ccb">XDpRxSs_AudioEnable</a>(InstancePtr)&#160;&#160;&#160;XDp_RxAudioEn((InstancePtr)-&gt;DpPtr)</td></tr>
<tr class="memdesc:ga9e38329d9022180b1d0e4379af733ccb"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function macro enables audio stream packets on the main link.  <a href="group__dprxss.html#ga9e38329d9022180b1d0e4379af733ccb">More...</a><br/></td></tr>
<tr class="separator:ga9e38329d9022180b1d0e4379af733ccb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaedaea6732cb0140c0e7c107bae87a6dd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gaedaea6732cb0140c0e7c107bae87a6dd">XDpRxSs_AudioDisable</a>(InstancePtr)&#160;&#160;&#160;XDp_RxAudioDis((InstancePtr)-&gt;DpPtr)</td></tr>
<tr class="memdesc:gaedaea6732cb0140c0e7c107bae87a6dd"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function macro disables audio stream packets on the main link.  <a href="group__dprxss.html#gaedaea6732cb0140c0e7c107bae87a6dd">More...</a><br/></td></tr>
<tr class="separator:gaedaea6732cb0140c0e7c107bae87a6dd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6f9de5c9cfe65efb801061c596db2cbe"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga6f9de5c9cfe65efb801061c596db2cbe">XDpRxSs_AudioReset</a>(InstancePtr)&#160;&#160;&#160;XDp_RxAudioReset((InstancePtr)-&gt;DpPtr)</td></tr>
<tr class="memdesc:ga6f9de5c9cfe65efb801061c596db2cbe"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function macro resets the reception of audio stream packets on the main link.  <a href="group__dprxss.html#ga6f9de5c9cfe65efb801061c596db2cbe">More...</a><br/></td></tr>
<tr class="separator:ga6f9de5c9cfe65efb801061c596db2cbe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9dc9e09a11d8dcc154d443e1ff9a26c2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga9dc9e09a11d8dcc154d443e1ff9a26c2">XDpRxSs_Mst_AudioEnable</a>(InstancePtr, StreamId)&#160;&#160;&#160;XDp_Rx_Mst_AudioEn((InstancePtr)-&gt;DpPtr, StreamId)</td></tr>
<tr class="memdesc:ga9dc9e09a11d8dcc154d443e1ff9a26c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function macro enables MST audio on a given stream on the main link.  <a href="group__dprxss.html#ga9dc9e09a11d8dcc154d443e1ff9a26c2">More...</a><br/></td></tr>
<tr class="separator:ga9dc9e09a11d8dcc154d443e1ff9a26c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafd93c598f9c17b8a7474badc426f5b66"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gafd93c598f9c17b8a7474badc426f5b66">XDpRxSs_Mst_AudioDisable</a>(InstancePtr)&#160;&#160;&#160;XDp_RxAudioDis((InstancePtr)-&gt;DpPtr)</td></tr>
<tr class="memdesc:gafd93c598f9c17b8a7474badc426f5b66"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function macro disables audio on a given stream on the main link.  <a href="group__dprxss.html#gafd93c598f9c17b8a7474badc426f5b66">More...</a><br/></td></tr>
<tr class="separator:gafd93c598f9c17b8a7474badc426f5b66"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac12fae71e2f814c34ebf8cf3007631e2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gac12fae71e2f814c34ebf8cf3007631e2">XDpRxSs_WaitUs</a>(InstancePtr, MicroSeconds)&#160;&#160;&#160;XDp_WaitUs((InstancePtr)-&gt;DpPtr, MicroSeconds)</td></tr>
<tr class="memdesc:gac12fae71e2f814c34ebf8cf3007631e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function macro is the delay/sleep function for the <a class="el" href="struct_x_dp_rx_ss.html" title="The DisplayPort RX Subsystem driver instance data. ">XDpRxSs</a> driver.  <a href="group__dprxss.html#gac12fae71e2f814c34ebf8cf3007631e2">More...</a><br/></td></tr>
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Typedefs</h2></td></tr>
<tr class="memitem:ga08e2bd2c57493838bbfac653dbe2bd66"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga08e2bd2c57493838bbfac653dbe2bd66">XDpRxSs_Callback</a> )(void *InstancePtr)</td></tr>
<tr class="memdesc:ga08e2bd2c57493838bbfac653dbe2bd66"><td class="mdescLeft">&#160;</td><td class="mdescRight">Callback type which represents the handler for events.  <a href="group__dprxss.html#ga08e2bd2c57493838bbfac653dbe2bd66">More...</a><br/></td></tr>
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Enumerations</h2></td></tr>
<tr class="memitem:ga7b73be64577a646cadafa5a3398a8d3d"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga7b73be64577a646cadafa5a3398a8d3d">XDpRxSs_HdcpProtocol</a> { <a class="el" href="group__dprxss.html#gga7b73be64577a646cadafa5a3398a8d3da1192b5522e315ff3b6c1bda6b76e3ead">XDPRXSS_HDCP_NONE</a>, 
<a class="el" href="group__dprxss.html#gga7b73be64577a646cadafa5a3398a8d3da855e97f6c420537ef5335cbb66f8fcc7">XDPRXSS_HDCP_14</a>, 
<a class="el" href="group__dprxss.html#gga7b73be64577a646cadafa5a3398a8d3da598641c0b966b1140f1f7030af099646">XDPRXSS_HDCP_22</a>, 
<a class="el" href="group__dprxss.html#gga7b73be64577a646cadafa5a3398a8d3daf17761e8d9d184c6bd0210fd0fde04ab">XDPRXSS_HDCP_BOTH</a>
 }</td></tr>
<tr class="memdesc:ga7b73be64577a646cadafa5a3398a8d3d"><td class="mdescLeft">&#160;</td><td class="mdescRight">These constants specify the HDCP protection schemes.  <a href="group__dprxss.html#ga7b73be64577a646cadafa5a3398a8d3d">More...</a><br/></td></tr>
<tr class="separator:ga7b73be64577a646cadafa5a3398a8d3d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3ca7c841e35b2dfe41310092b3837b31"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga3ca7c841e35b2dfe41310092b3837b31">XDpRxSs_HandlerType</a> { <br/>
&#160;&#160;<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31ab5882181a8edf31196932d84f82ced50">XDPRXSS_HANDLER_DP_VM_CHG_EVENT</a> = 1, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31af22eb893491e4a1b83df7a4bd35e8abe">XDPRXSS_HANDLER_DP_PWR_CHG_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a7a6e35c4a9fac72087282bf5aa3216f7">XDPRXSS_HANDLER_DP_NO_VID_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a6d19a37b6271d02f50368d9284f64b6a">XDPRXSS_HANDLER_DP_VBLANK_EVENT</a>, 
<br/>
&#160;&#160;<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31afd6250ba9a49ebe26f5be42103625e3f">XDPRXSS_HANDLER_DP_TLOST_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a79f779e134981300fc7ab52b2bf11eff">XDPRXSS_HANDLER_DP_VID_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a9509fff116bd038c71045fd18b54af06">XDPRXSS_HANDLER_DP_INFO_PKT_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31acbc934b65bafeb85348c8274193f8eaf">XDPRXSS_HANDLER_DP_EXT_PKT_EVENT</a>, 
<br/>
&#160;&#160;<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31aeddd5b57682f2d8c3e7f07403d184339">XDPRXSS_HANDLER_DP_TDONE_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31ac41fb1333ca3e3b60e5677382e2274fa">XDPRXSS_HANDLER_DP_BW_CHG_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a93d97f416e80d71c176cd031b6d757cf">XDPRXSS_HANDLER_DP_DWN_REQ_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a6e837e7f939c39fe6ce42f1c2c6af5cc">XDPRXSS_HANDLER_DP_DWN_REP_EVENT</a>, 
<br/>
&#160;&#160;<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a07cc4d6393552a8b53d732f151bbe9ad">XDPRXSS_HANDLER_DP_AUD_OVRFLW_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a6a5642a97fec667477c5eea73192a4e8">XDPRXSS_HANDLER_DP_PAYLOAD_ALLOC_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a00fee3de49d36bba93dea56f115d2699">XDPRXSS_HANDLER_DP_ACT_RX_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31ab28cd614aced217dd5698e91b43e3c07">XDPRXSS_HANDLER_DP_CRC_TEST_EVENT</a>, 
<br/>
&#160;&#160;<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a54d8a7534f2766333f1048fcad9e3cbd">XDPRXSS_HANDLER_UNPLUG_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a148ff5a3b54e14baaf0ce9740d4e90a3">XDPRXSS_HANDLER_LINKBW_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a4ee8d2b95922a7fd6a85f519b8e8919a">XDPRXSS_HANDLER_PLL_RESET_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a51438ae9459d42e97912ec565f33008f">XDPRXSS_DRV_HANDLER_DP_PWR_CHG_EVENT</a>, 
<br/>
&#160;&#160;<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31ae3352e504bfe4182697b9cc1d23f57ee">XDPRXSS_DRV_HANDLER_DP_VID_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a428d19d1a9c1e542daeb251a863ab07b">XDPRXSS_DRV_HANDLER_DP_NO_VID_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a911f359d919c9b6d7b945674f7910eff">XDPRXSS_HANDLER_ACCESS_LANE_SET_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a90bd0bc7d763792b6e8abcc4136f7fb9">XDPRXSS_HANDLER_ACCESS_LINK_QUAL_EVENT</a>, 
<br/>
&#160;&#160;<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31ae849672cbd7972a17de1262735966e9b">XDPRXSS_HANDLER_ACCESS_ERROR_COUNTER_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a787777e4c0e3b27e0ca0c616b0f43906">XDPRXSS_HANDLER_DP_VBLANK_STREAM_2_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a558df4ac29ad329960e0a42cc9997b23">XDPRXSS_HANDLER_DP_VBLANK_STREAM_3_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31afba12dbf314bf794808757bc49c8d393">XDPRXSS_HANDLER_DP_VBLANK_STREAM_4_EVENT</a>, 
<br/>
&#160;&#160;<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31ae31683ea6ee150368455d8e50c2f12cf">XDPRXSS_HANDLER_DP_ADAPTIVESYNC_SDP_STREAM_1_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31ad268f553fc729c9fccb7ef1f928568e4">XDPRXSS_HANDLER_DP_ADAPTIVESYNC_SDP_STREAM_2_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a102d46be97d57c8a9802c56a797e0f7a">XDPRXSS_HANDLER_DP_ADAPTIVESYNC_SDP_STREAM_3_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a4854a53efc49a6554d36d44989ae79f1">XDPRXSS_HANDLER_DP_ADAPTIVESYNC_SDP_STREAM_4_EVENT</a>, 
<br/>
&#160;&#160;<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a5dbc9786865543fc5684ce3b3eefe267">XDPRXSS_HANDLER_DP_ADAPTIVESYNC_VBLANK_STREAM_1_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a3a25e7bfef55157397ae9178cfaf0ee6">XDPRXSS_HANDLER_DP_ADAPTIVESYNC_VBLANK_STREAM_2_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31aa36c79072fb687efa2aceabe4a4647b9">XDPRXSS_HANDLER_DP_ADAPTIVESYNC_VBLANK_STREAM_3_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31ae25b4ddf496f29c283341610c6c2ded6">XDPRXSS_HANDLER_DP_ADAPTIVESYNC_VBLANK_STREAM_4_EVENT</a>, 
<br/>
&#160;&#160;<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a487ab994f7f5c2749dbb782dbd41a87e">XDPRXSS_HANDLER_DP_VM_CHG_STREAM_2_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a213f8903d09354f05fd48509de977d87">XDPRXSS_HANDLER_DP_VM_CHG_STREAM_3_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a206ce28ff9ef9060a0fcc907a77200d2">XDPRXSS_HANDLER_DP_VM_CHG_STREAM_4_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31ae936d95034351feeaaa75d767f2e3a63">XDPRXSS_HANDLER_DP_NO_VID_STREAM_2_EVENT</a>, 
<br/>
&#160;&#160;<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31aab64917bcd30a1fcbfce5a575b5344c6">XDPRXSS_HANDLER_DP_NO_VID_STREAM_3_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a9a7d10ce42f36d17d0166b2aacb9769a">XDPRXSS_HANDLER_DP_NO_VID_STREAM_4_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a0a42596573bc60e8f94c8e3b7b48ae11">XDPRXSS_HANDLER_DP_VID_STREAM_2_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a8ba7598e65a53881da3894dbc642a25c">XDPRXSS_HANDLER_DP_VID_STREAM_3_EVENT</a>, 
<br/>
&#160;&#160;<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31aebe4fe8a61e39c555fc6db0c808d9ea1">XDPRXSS_HANDLER_DP_VID_STREAM_4_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a43d1d1f060262ac36e3472f3b3d29954">XDPRXSS_HANDLER_DP_INFO_PKT_STREAM_2_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a0a124902cabee7c2f353eb79f5745805">XDPRXSS_HANDLER_DP_INFO_PKT_STREAM_3_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31ab231d725890ba3a4e58d1bfb4ecf7725">XDPRXSS_HANDLER_DP_INFO_PKT_STREAM_4_EVENT</a>, 
<br/>
&#160;&#160;<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31abb12c3c800c8b075c7c54ec2683e2080">XDPRXSS_HANDLER_DP_EXT_PKT_STREAM_2_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31ae7993d59dd06594fdce87aab132984a7">XDPRXSS_HANDLER_DP_EXT_PKT_STREAM_3_EVENT</a>, 
<a class="el" href="group__dprxss.html#gga3ca7c841e35b2dfe41310092b3837b31a054e4bf1d20ed8968f437ea9d6e4d946">XDPRXSS_HANDLER_DP_EXT_PKT_STREAM_4_EVENT</a>
<br/>
 }</td></tr>
<tr class="memdesc:ga3ca7c841e35b2dfe41310092b3837b31"><td class="mdescLeft">&#160;</td><td class="mdescRight">These constants specify different types of handler and used to differentiate interrupt requests from sub-cores.  <a href="group__dprxss.html#ga3ca7c841e35b2dfe41310092b3837b31">More...</a><br/></td></tr>
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</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga81fb45e531552358b584b48d5d1d65f5"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_dp_rx_ss___config.html">XDpRxSs_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga81fb45e531552358b584b48d5d1d65f5">XDpRxSs_LookupConfig</a> (u16 DeviceId)</td></tr>
<tr class="memdesc:ga81fb45e531552358b584b48d5d1d65f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns a reference to an <a class="el" href="struct_x_dp_rx_ss___config.html" title="This typedef contains configuration information for the DisplayPort Receiver Subsystem core...">XDpRxSs_Config</a> structure based on the core id, <em>DeviceId</em>.  <a href="group__dprxss.html#ga81fb45e531552358b584b48d5d1d65f5">More...</a><br/></td></tr>
<tr class="separator:ga81fb45e531552358b584b48d5d1d65f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga25f3b6123ff5cbf277c4117617980738"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga25f3b6123ff5cbf277c4117617980738">XDpRxSs_CfgInitialize</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr, <a class="el" href="struct_x_dp_rx_ss___config.html">XDpRxSs_Config</a> *CfgPtr, UINTPTR EffectiveAddr)</td></tr>
<tr class="memdesc:ga25f3b6123ff5cbf277c4117617980738"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function initializes the DisplayPort Receiver Subsystem core.  <a href="group__dprxss.html#ga25f3b6123ff5cbf277c4117617980738">More...</a><br/></td></tr>
<tr class="separator:ga25f3b6123ff5cbf277c4117617980738"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5ada36b95407b1169e183bbb7b9847d6"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga5ada36b95407b1169e183bbb7b9847d6">XDpRxSs_Start</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga5ada36b95407b1169e183bbb7b9847d6"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function starts the DisplayPort Receiver Subsystem including all sub-cores.  <a href="group__dprxss.html#ga5ada36b95407b1169e183bbb7b9847d6">More...</a><br/></td></tr>
<tr class="separator:ga5ada36b95407b1169e183bbb7b9847d6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf724dbd61d196f9bd1a8060f1f73816d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gaf724dbd61d196f9bd1a8060f1f73816d">XDpRxSs_Reset</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaf724dbd61d196f9bd1a8060f1f73816d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function resets the DisplayPort Receiver Subsystem including all sub-cores.  <a href="group__dprxss.html#gaf724dbd61d196f9bd1a8060f1f73816d">More...</a><br/></td></tr>
<tr class="separator:gaf724dbd61d196f9bd1a8060f1f73816d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae447b427e7616d143f2170881fa79bb1"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gae447b427e7616d143f2170881fa79bb1">XDpRxSs_SetLinkRate</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr, u8 LinkRate)</td></tr>
<tr class="memdesc:gae447b427e7616d143f2170881fa79bb1"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the data rate to be used by the DisplayPort RX Subsystem core.  <a href="group__dprxss.html#gae447b427e7616d143f2170881fa79bb1">More...</a><br/></td></tr>
<tr class="separator:gae447b427e7616d143f2170881fa79bb1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga180a0386c25a456d436bbfc9fec05c02"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga180a0386c25a456d436bbfc9fec05c02">XDpRxSs_SetLaneCount</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr, u8 LaneCount)</td></tr>
<tr class="memdesc:ga180a0386c25a456d436bbfc9fec05c02"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the number of lanes to be used by DisplayPort RX Subsystem core.  <a href="group__dprxss.html#ga180a0386c25a456d436bbfc9fec05c02">More...</a><br/></td></tr>
<tr class="separator:ga180a0386c25a456d436bbfc9fec05c02"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga65886916bf0be3e73f4d718ec087c6f5"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga65886916bf0be3e73f4d718ec087c6f5">XDpRxSs_ExposePort</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr, u8 Port)</td></tr>
<tr class="memdesc:ga65886916bf0be3e73f4d718ec087c6f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function allows the user to select number of ports to be exposed when replying to a LINK_ADDRESS sideband message and hides rest of the ports.  <a href="group__dprxss.html#ga65886916bf0be3e73f4d718ec087c6f5">More...</a><br/></td></tr>
<tr class="separator:ga65886916bf0be3e73f4d718ec087c6f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad307346eadf7cca46055eb02f8e92ddb"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gad307346eadf7cca46055eb02f8e92ddb">XDpRxSs_CheckLinkStatus</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:gad307346eadf7cca46055eb02f8e92ddb"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function checks if the receiver's DisplayPort Configuration Data (DPCD) indicates that the receiver has achieved clock recovery, channel equalization, symbol lock, and interlane alignment for all lanes currently in use.  <a href="group__dprxss.html#gad307346eadf7cca46055eb02f8e92ddb">More...</a><br/></td></tr>
<tr class="separator:gad307346eadf7cca46055eb02f8e92ddb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaae2cb38734654cfeca1d77b0439c243e"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gaae2cb38734654cfeca1d77b0439c243e">XDpRxSs_HandleDownReq</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaae2cb38734654cfeca1d77b0439c243e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function handles incoming sideband messages.  <a href="group__dprxss.html#gaae2cb38734654cfeca1d77b0439c243e">More...</a><br/></td></tr>
<tr class="separator:gaae2cb38734654cfeca1d77b0439c243e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga40a20785049e0c92a24c2612dd6a7098"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga40a20785049e0c92a24c2612dd6a7098">XDpRxSs_SetUserPixelWidth</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr, u8 UserPixelWidth)</td></tr>
<tr class="memdesc:ga40a20785049e0c92a24c2612dd6a7098"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function configures the number of pixels output through the user data interface.  <a href="group__dprxss.html#ga40a20785049e0c92a24c2612dd6a7098">More...</a><br/></td></tr>
<tr class="separator:ga40a20785049e0c92a24c2612dd6a7098"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacf7adeed24f0875c0021511eb1e227de"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gacf7adeed24f0875c0021511eb1e227de">XDpRxss_GetBpc</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr, u8 Stream)</td></tr>
<tr class="memdesc:gacf7adeed24f0875c0021511eb1e227de"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function extracts the bits per color from MISC0 or VSC SDP packet based on whether reception of colorimetry information through VSC SDP packets or through MISC registers of the stream.  <a href="group__dprxss.html#gacf7adeed24f0875c0021511eb1e227de">More...</a><br/></td></tr>
<tr class="separator:gacf7adeed24f0875c0021511eb1e227de"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6a89274c77d341860816fb8b7c91af15"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga6a89274c77d341860816fb8b7c91af15">XDpRxss_GetColorComponent</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr, u8 Stream)</td></tr>
<tr class="memdesc:ga6a89274c77d341860816fb8b7c91af15"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function extracts the color component format from MISC0 or VSC SDP packet based on whether reception of colorimetry information through VSC SDP packets or through MISC registers of the stream.  <a href="group__dprxss.html#ga6a89274c77d341860816fb8b7c91af15">More...</a><br/></td></tr>
<tr class="separator:ga6a89274c77d341860816fb8b7c91af15"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadd13d6f04f770d059be4a2a5668c88be"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gadd13d6f04f770d059be4a2a5668c88be">XDpRxss_GetColorimetry</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr, u8 Stream)</td></tr>
<tr class="memdesc:gadd13d6f04f770d059be4a2a5668c88be"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function extracts the YCbCrColorimetry from MISC0 or VSC SDP packet based on whether reception of colorimetry information through VSC SDP packets or through MISC registers of the stream.  <a href="group__dprxss.html#gadd13d6f04f770d059be4a2a5668c88be">More...</a><br/></td></tr>
<tr class="separator:gadd13d6f04f770d059be4a2a5668c88be"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1339e3fb35d4efb7f35214a0e167fb78"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga1339e3fb35d4efb7f35214a0e167fb78">XDpRxss_GetDynamicRange</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr, u8 Stream)</td></tr>
<tr class="memdesc:ga1339e3fb35d4efb7f35214a0e167fb78"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function extracts the dynamic range from MISC0 or VSC SDP packet based on whether reception of colorimetry information through VSC SDP packets or through MISC registers of the stream.  <a href="group__dprxss.html#ga1339e3fb35d4efb7f35214a0e167fb78">More...</a><br/></td></tr>
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<tr class="memitem:ga5bcda88f1e979aa99b8a903a12e421fc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga5bcda88f1e979aa99b8a903a12e421fc">XDpRxSs_ReportCoreInfo</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga5bcda88f1e979aa99b8a903a12e421fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function reports list of sub-cores included in DisplayPort RX Subsystem.  <a href="group__dprxss.html#ga5bcda88f1e979aa99b8a903a12e421fc">More...</a><br/></td></tr>
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<tr class="memitem:ga1c18157ed811924d1a2f1dd60a6f3629"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga1c18157ed811924d1a2f1dd60a6f3629">XDpRxSs_ReportLinkInfo</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga1c18157ed811924d1a2f1dd60a6f3629"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function prints the link status, selected resolution, link rate /lane count symbol error.  <a href="group__dprxss.html#ga1c18157ed811924d1a2f1dd60a6f3629">More...</a><br/></td></tr>
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<tr class="memitem:ga1db1ad90aab468e882f66cb36a9fcec0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga1db1ad90aab468e882f66cb36a9fcec0">XDpRxSs_ReportMsaInfo</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga1db1ad90aab468e882f66cb36a9fcec0"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function prints the current main stream attributes from the DisplayPort RX core.  <a href="group__dprxss.html#ga1db1ad90aab468e882f66cb36a9fcec0">More...</a><br/></td></tr>
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<tr class="memitem:gab0ccd2eb3d6c5633d9ca61961ddc911d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gab0ccd2eb3d6c5633d9ca61961ddc911d">XDpRxSs_ReportHdcpInfo</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:gab0ccd2eb3d6c5633d9ca61961ddc911d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function prints the debug display info of the HDCP interface.  <a href="group__dprxss.html#gab0ccd2eb3d6c5633d9ca61961ddc911d">More...</a><br/></td></tr>
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<tr class="memitem:ga9a5414c99d822a3848b6ef7442fe551d"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga9a5414c99d822a3848b6ef7442fe551d">XDpRxSs_SelfTest</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga9a5414c99d822a3848b6ef7442fe551d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function performs self test on DisplayPort Receiver Subsystem sub-cores.  <a href="group__dprxss.html#ga9a5414c99d822a3848b6ef7442fe551d">More...</a><br/></td></tr>
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<tr class="memitem:ga666df5371b82b3dec85271c007f1625d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga666df5371b82b3dec85271c007f1625d">XDpRxSs_DpIntrHandler</a> (void *InstancePtr)</td></tr>
<tr class="memdesc:ga666df5371b82b3dec85271c007f1625d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is the interrupt handler for the DisplayPort RX core operating in RX mode.  <a href="group__dprxss.html#ga666df5371b82b3dec85271c007f1625d">More...</a><br/></td></tr>
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<tr class="memitem:ga62ff0e8ca041ca225de6e1a0baefa0c6"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga62ff0e8ca041ca225de6e1a0baefa0c6">XDpRxSs_SetCallBack</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr, u32 HandlerType, void *CallbackFunc, void *CallbackRef)</td></tr>
<tr class="memdesc:ga62ff0e8ca041ca225de6e1a0baefa0c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function installs an asynchronous callback function for the given HandlerType:  <a href="group__dprxss.html#ga62ff0e8ca041ca225de6e1a0baefa0c6">More...</a><br/></td></tr>
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<tr class="memitem:gaf684915f482b58b5b4dcd9950f4af1a7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gaf684915f482b58b5b4dcd9950f4af1a7">XDpRxSs_SetUserTimerHandler</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr, <a class="el" href="group__dprxss.html#gafacc99acbea2d401998a9f7f3c1d3a14">XDpRxSs_TimerHandler</a> CallbackFunc, void *CallbackRef)</td></tr>
<tr class="memdesc:gaf684915f482b58b5b4dcd9950f4af1a7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function installs a custom delay/sleep function to be used by the DisplayPort RX Subsystem.  <a href="group__dprxss.html#gaf684915f482b58b5b4dcd9950f4af1a7">More...</a><br/></td></tr>
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<tr class="memitem:ga559238c630ee96cbca342bb098d488fd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga559238c630ee96cbca342bb098d488fd">XDpRxSs_DrvNoVideoHandler</a> (void *InstancePtr)</td></tr>
<tr class="memdesc:ga559238c630ee96cbca342bb098d488fd"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is the interrupt handler for No Video.  <a href="group__dprxss.html#ga559238c630ee96cbca342bb098d488fd">More...</a><br/></td></tr>
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<tr class="memitem:gafe7a6062139a0cc9b6128ba8af7eea9e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gafe7a6062139a0cc9b6128ba8af7eea9e">XDpRxSs_DrvVideoHandler</a> (void *InstancePtr)</td></tr>
<tr class="memdesc:gafe7a6062139a0cc9b6128ba8af7eea9e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is for the video interrupt handler.  <a href="group__dprxss.html#gafe7a6062139a0cc9b6128ba8af7eea9e">More...</a><br/></td></tr>
<tr class="separator:gafe7a6062139a0cc9b6128ba8af7eea9e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2e2d30f0b82711802df4a555897f8e09"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga2e2d30f0b82711802df4a555897f8e09">XDpRxSs_DrvPowerChangeHandler</a> (void *InstancePtr)</td></tr>
<tr class="memdesc:ga2e2d30f0b82711802df4a555897f8e09"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is for the power change interrupt handler.  <a href="group__dprxss.html#ga2e2d30f0b82711802df4a555897f8e09">More...</a><br/></td></tr>
<tr class="separator:ga2e2d30f0b82711802df4a555897f8e09"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae46f9dee4bb4a7e6ab6967fb572d2f50"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gae46f9dee4bb4a7e6ab6967fb572d2f50">XDpRxSs_SetAdaptiveSyncCaps</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr, u32 Enable)</td></tr>
<tr class="memdesc:gae46f9dee4bb4a7e6ab6967fb572d2f50"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets Adaptive-Sync capabilities to DisplayPort RX Subsystem.  <a href="group__dprxss.html#gae46f9dee4bb4a7e6ab6967fb572d2f50">More...</a><br/></td></tr>
<tr class="separator:gae46f9dee4bb4a7e6ab6967fb572d2f50"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga00dc5117998ae4d8fb593bb4c5be07b1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga00dc5117998ae4d8fb593bb4c5be07b1">XDpRxSs_MaskAdaptiveIntr</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:ga00dc5117998ae4d8fb593bb4c5be07b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function masks the Adaptive-Sync interrupts from DisplayPort RX Subsystem.  <a href="group__dprxss.html#ga00dc5117998ae4d8fb593bb4c5be07b1">More...</a><br/></td></tr>
<tr class="separator:ga00dc5117998ae4d8fb593bb4c5be07b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8d8c911ce381882bf28bdb51b9cffc62"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga8d8c911ce381882bf28bdb51b9cffc62">XDpRxSs_UnMaskAdaptiveIntr</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:ga8d8c911ce381882bf28bdb51b9cffc62"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function unmasks Adaptive-Sync interrupt from DisplayPort RX Subsystem.  <a href="group__dprxss.html#ga8d8c911ce381882bf28bdb51b9cffc62">More...</a><br/></td></tr>
<tr class="separator:ga8d8c911ce381882bf28bdb51b9cffc62"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9a0f8a225ae1bfffcd34c512500fc8b2"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga9a0f8a225ae1bfffcd34c512500fc8b2">XDpRxSs_GetVblank</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr, u8 Stream)</td></tr>
<tr class="memdesc:ga9a0f8a225ae1bfffcd34c512500fc8b2"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function retrieves the current vblank value of the incoming video stream.  <a href="group__dprxss.html#ga9a0f8a225ae1bfffcd34c512500fc8b2">More...</a><br/></td></tr>
<tr class="separator:ga9a0f8a225ae1bfffcd34c512500fc8b2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga28534a26466651e4c4c51fc24a2e9064"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga28534a26466651e4c4c51fc24a2e9064">XDpRxSs_GetVtotal</a> (<a class="el" href="struct_x_dp_rx_ss.html">XDpRxSs</a> *InstancePtr, u8 Stream)</td></tr>
<tr class="memdesc:ga28534a26466651e4c4c51fc24a2e9064"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function retrieves the current VTotal value of the incoming video stream.  <a href="group__dprxss.html#ga28534a26466651e4c4c51fc24a2e9064">More...</a><br/></td></tr>
<tr class="separator:ga28534a26466651e4c4c51fc24a2e9064"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9cdb547f48349408f016e6c376655a69"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga9cdb547f48349408f016e6c376655a69">XDpRxSs_McDp6000_init</a> (void *InstancePtr)</td></tr>
<tr class="memdesc:ga9cdb547f48349408f016e6c376655a69"><td class="mdescLeft">&#160;</td><td class="mdescRight">This routine initializes the MCDP6000 part on the VFMC card used for DP 1.4.  <a href="group__dprxss.html#ga9cdb547f48349408f016e6c376655a69">More...</a><br/></td></tr>
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